t2design, Inc. provides HDL Design and Methodology Process Management Solutions. We specialized in customizing project methodologies that create a cohesive, recreatable design process from the architecture phase through verification. Data flow and process management planning needed to accompany the HDL design approach to create a complete project solution. Our team of designers implement this ASIC and FPGA methodology strategy while leveraging the EDA tools to their fullest level of effectiveness.
Architecture and Technical Management often go hand in hand. Our team based approach leverages our 25 years experience with current technologies to solve our clients problems. We have been involved in test equipment of rocket guidance systems, emulation of mechanical turrets, development of SystemVerilog Testbench frameworks and deployment of Agile/Scrum for hardware. All of these projects required a team approach and new thinking to solve our clients problems.
Implementation is the task of taking a stated architecture solution and performing the detail implementation to meet the architectural goals which often have conflicting and intersecting requirements. Solutions include; developing a scalable regression framework with MATLAB as the golden input, migration to new ASIC foundry and an almost decade jump in toll versions, migration of 5000 sources file from VerilogXL to NCVerilog, VHDL source to productize a daughter card with different protocols.
Verification is the activity to ensure that the implementation met the requirements. t2design has been involved in verification at multiple levels including: Static Timing Analysis, Test Vector Generation, Functional Requirements tracking and Performance Testing to name a few. We exploit whatever tools are available including: SytemVerilog, SystemC, HDL based BFMs, ATPG Vector Generation, and TestBuilder, We apply process driven approaches like functional requirements gathering using the 5-day verification plan approach.