Clients Success

ASIC Emulation with a Custom FPGA Design.

Client required a repeatable methodology to move ASIC design code into an custom FPGA emulation system.  Challenges included:

  • Emulation PCB already designed with preliminary estimates from the ASIC engineers. 
  • Pin locking of all FPGAs.
  • Desired cycle accurate.
  • ASIC code could not endure any modifications.

Submitted a  project as a case study for Design SuperCon 98.
 

Development of Full Custom Imaging Chip.

Member of development team which designed a full custom imaging chip for a leading edge Colorado company.  Duties included:

  • development of custom synthesis cell library
  • verification of SPICE base simulations
  • synthesis of entire chip
  • verification of final gate level netlist.

Similar design for same customer but concentrated on the control logic for the design.  Customer required design in two weeks from concept to finished netlist.  With 6 man-weeks of effort the netlist was delivered.
 

Benchmarking of FPGA Back-End Software.

Client desired that the FPGA back-end software be tested to its applicability to real world problems.  Developed circuits which ranged from 5K gates to 65K gates to exercise FPGA tools.  Gained insight into the workings of Altera, Lucent and Xilinx Tools.
 

Training

Provided over 45 days of hands on VHDL training both on customer sites and off-site locations. 
Classes included:

  • 1 day seminars
  • 2 days hand-on synthesis training
  • 3-day VHDL introduction courses an
  • 5-day VHDL complete courses.

Provided 3 day schematic entry training to 60 engineers.  Involved was the development of course material, setup of equipment and delivery of the material.
 

3-D Graphics

Lead a team of engineers and consultants in the development of a next generation 3-D simulation system which involved shrinking a refrigerator size cabinet into a single 12x9 PCB with four distinct ASICs.  Responsible for team dynamics, communication, tools, validation and overall success of the design.

SuperCon paper  "Using VHDL Abstract Data Types to Design a 3-D Graphics Pipeline"  describes our unusual approach to solving the problem. ASIC

 

Ball Aerospace

Although I worked for Ball for many years my training at this company prepared me for work as a design consultant.  I often worked on projects that were behind schedule, under funded and lacking direction.  This sums up many of the type of jobs that consultants are handed.  
 

Horizon Sensor:

Someone forgot that we could not hook up a horizon sensor to the real satellite until we were ready to launch it.  We needed a test fixture which would act like the sensor and interface to real flight electronics without damaging them.  They gave me 6 weeks, a block diagram and access to all the CMOS 4000 series I wanted.  Finished the design in 5 weeks including building the unit and tested it the 6th.  They were very happy with the results, the sensor worked as designed and firmware responded properly.
 

How do you model a turret with electronics?

I received a call to design a test fixture for a turret.  Ok what's a turret and why do you need a test fixture.  Well we need something to emulate the turret, this one hangs on the bottom of an AC130 aircraft with optics on it.  It weights about 800 pounds, do you think you can do this, by the way we need it about 3 to 4 months and we want to have a PC interface to it.  Can you do it?

I asked and received one tech, one software coder (mathmatics expert) and a budget of $10K for parts.  For that I needed to get may parts from the local used part electronic store.

The control system guy who was working on this design hands me a 11x17 sheet block diagram of the control system, it seems to have an outer loop working at 4 Hz and an inner loop working at 30 Hz.  I decide to build the inner loop as analog control system.  The step response is kind of hard to meet with all digital, did I tell you I have a 10MHz 286 as my computer.

The tech points out that the driver is expecting a big inductive load, I wasn't ignoring that fact just wanted to make sure we could do the hard stuff.  I send the tech off to wire some inductors for me with a couple of 0.1 ohm resisters to us as current sensors.  I need to know how much current the thing is driving to know how to respond.

After three, yes three board revs on the analog inner loop I finally get it working.  By the way I didn't have real boards for the analog section the last was copper plate with the sockets ground out and solder posts for resisters and capacitors.  All in all it was ready after 6 months of effort, firmware for the driver was ready when the real turret arrived and other then a few operational modes which we couldn't anticipate (you control folks know about modes) it worked.
 

We bought this great Array Processor but it can't do...

I was brought into this project by another engineer who I admire a lot and had worked with on two other projects.  Our task was to design a board to get data into a high speed, DSP laden array processor.  Software engineers had designed this system (just a getting us back for all the system that hardware engineers design for them).  We needed to reformat the data as it was coming form four different streams in a very strange order.  I don't ask I do!  As we are developing this little card that goes into the array processor and the little reformat box, the software gurus discover that they don't have the overhead to perform the gain/offset correction of the image data.

We step up and say we can do that for you what are the coefficients?  Well it turns out that it is really non-linear gain and offset correction and they need to download the info to us.  We have to now build a bi-directional interface to the array processor and the non-linear gain and offset.  No problem give us a little more schedule and we have it.

To make matters worst (better in my mind) we have a new Mentor Graphics system which I helped procure and I am proving to management it can make your life better.  I have everything simulating and we are going to go to PCB from the schematic and skip that pesky wire-wrap board phase.

About a month passes by and we have the non-linear gain/offset working in simulation and the interface board in the array processor is coming along well.  We have some tricky clock problems because of all the pipelining but have them figured out also.  Those pesky software guys now tell us they can't do the special windowing functions they need in the array processor and could we tack that onto our board also?  Well this board is now a 3-tiered VME 270 cm board, damn big as boards go and I just found out that I need 4 of these hummers in the chassis, I am keep in the dark about many aspects of this design.

We commit to building another board with all this cool functionality on board.  Management is getting nervous and want a project review.  We are shown as the long pole in the tent, hell 6 months earlier we weren't even in the tent.  Talk about pressure.  Management decided that the PCB approach is to risky and want a wire-wrap board made, I push back and tell them the new one could be wire-wrap but the first is going out to PCB fabrication; they give me that.

The PCB comes back, we stuff, we find some bad sockets, we get it into the chassis, I get my first look at the chassis (man is it large), we test and in about 2-weeks of playing with code the thing works.  Ok, I did make 3 changes in the PALs; did I tell you about the 30 (yes thirty) PALs I designed for just this board (it would have been nice to have FPGAs back then, just a year to late).  No wiring changes at all, damn I was proud.

The other board has a micro-sequencer on it from AMD and I have more engineers helping me than I can stand.  We finish the first iteration of this board in 6 weeks which fills about 65% of the board space.  Two weeks in the lab and back at the workstation and it is finally working.  Just a couple of more software items pushed into hardware and we are done.  Total project time 1 year, my involvement 7 months, 2 PCB's, 1 wire-wrap board, 1 custom chassis, 45 PALs and Sequencer and total success.  All the units were sold.